Posts Tagged ‘EPIC’

The future of computing belongs to the EPIC architecture

Last spring, many of you know that some of the world’s top processor compiler engineers gathered together this spring in Toronto to share their latest research findings in the area of compiler technology and discuss how to realize the full potential of the EPIC architecture. Great content, presentations, and ideas that came out of the worskshop, highlighted below.

David R. Ditzel, Vice President and Chief Architect for Hybrid Parallel Computing for the Intel Architecture Group at Intel Corporation gave the keynote address titled “Dynamic Translation on EPIC Architectures.” During the keynote, Dr. Ditzel explained his thesis that The future of computing belongs to EPIC Architectures saying that EPIC is a more power efficient approach to computing, that dynamic translation will improve power advantages, and that there may be a different EPIC in the future than we know today. Click here for Dr. Ditzel’s slide presentation. Dr. Ditzel further detailed why we need the EPIC architecture and emphasized its advantages:

- Simplified hardware: Simpler to design, smaller cores means more cores per die
- Enabling software scheduling: EPIC architectures are easier for DBT to schedule, better scheduling is the key to future performance gains
- Power: In-order pipelines for EPIC are power efficient, less hardware for OOO means lower power, and more amenable to new power saving techniques

Lambert Schaelicke, Component Design Engineer, Intel Corporation, gave a presentation named “Intel® Itanium® Quad-Core Architecture for the Enterprise,” providing an overview of the Intel Itanium 9300 series processor and highlighting the significant advances over previous-generation processors; including doubling the number of processing cores, the numerous microarchitectural enhancements in the cores, integration of a scalable directory-based system interconnect, and two memory controllers on the same die. Click here for the presentation abstract and the slide presentation.

Andrey Bokhanko, IPF Compiler Architect of Intel, and Workshop Chairman writes:

“I’m glad to report that the workshop was a definite success, proving once again that research on EPIC architectures and compilation technologies is alive and well all around the globe. See Andrey’s photos from this year’s event with captions.

Click here to view the final program with all presentations available for download.

Posted in Computationally Intensive Applications, Mainframe Modernization, Mission Critical Computing on June 28th, 2010 by | There are currently no Comments

Compiler summit this week

The EPIC8 workshop will be held this Saturday in Toronto, Canada. It is THE place to share research ideas and practical results related to compilation and optimization on EPIC architectures. If you haven’t registered yet, please act quickly! You can see the event details here.

We have a very strong program this year, with authors spanning six countries. We’re proud to welcome Lambert Schaelicke, who will deliver a presentation on the Intel® Itanium® Quad-Core Architecture for the Enterprise. Moreover, we’re pleased to announce that Dr David Ditzel (co-author of seminal paper on RISC architectures, founder and president of Transmeta Corporation, etc, etc) will give a keynote on past, present and future of dynamic translation on EPIC Architectures. You can see the full program here.

Even Eyjafjallajoekull is finally silencing its wrath in preparation for EPIC8!

Hope to see you there!

Register for the event here.

Posted in Computationally Intensive Applications, Mainframe Modernization, Mission Critical Computing on April 20th, 2010 by Andrey Bokhanko | There are currently no Comments

A truly EPIC event

Here is an interesting and not so well known fact about the Itanium architecture: it contains the world’s most advanced compiler technology. If you develop software for Itanium, by default, you are using one of the most powerful software development tools available on the planet. EPIC architectures rely on compilers to deliver high performance; thus, being a step ahead in adopting and creating the latest research results in this area is not a luxury – it is a necessity.

One of the premier forums aimed at gathering and sharing the latest and greatest in compilation, analysis, and optimization for EPIC architectures is called… you guessed it: EPIC. It has a long history and plenty of interesting research and practical results delivered in the past. You can learn more about past events here.

This year I’ve found myself in the position of the workshop chair… which promises both a lot of excitement and a lot of late nights for me. Topics include, but are not limited to: compiler optimizations (including methods of analysis, verification and validation), binary translations, feedback-directed optimizations, microarchitecture, advanced uses of EPIC architectures and performance analysis of EPIC architectures. Given the nature of the workshop, full papers are not necessarily required; extended abstract + slides are enough.

My charge is to solicit talks and papers worthy of the high level set by previous workshops. If you work closely with Itanium, and have read this far, your submission is welcome!

The workshop will take place on April 24th, 2010. It will take place concurrently with the International Symposium on Code Generation and Optimization (CGO 2010) in beautiful Toronto, Canada.

More information, including the all important submission deadline date (hint: it will happen quite soon) can be found here.

Posted in Computationally Intensive Applications, Mainframe Modernization, Mission Critical Computing on December 24th, 2009 by Andrey Bokhanko | There is currently 1 Comment